An approach to modeling clock tree of a complex system-on-chip

Abstract

Clock tree of a complex system-on-chip is modeled across different design stages independently, resulting in multiplication of time and effort needed to develop clock tree models. Model-based design is an emerging methodology that can improve the efficiency, time, and cost of a system design. We propose an approach to modeling clock tree of a complex system-on-chip by exploiting patterns in hardware architectures. Based on patterns, we create parametrized models of clocks which are represented in the form of a template. The specification of a clock consists of specifying parameter values for the template model. The modeling approach is used to generate clock tree models for a variety of design activities including system-level models for power management design.

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